Staff ML Engineer
Lorven Technologies, Inc.
- Job
- 29903
- Posted
- Location
- San Jose, CA
- Work type
- Contract
- Tax terms
- C2C
- Experience
- Experience open
- Rate
- $70 to $80 (Hourly)
- Openings
- 1 opening
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Skills
- AI
- Engineer
- Data Center
About the job
Role: Staff ML Engineer
Location: San Jose, CA, USA
Department: ML
AI-enhanced security processor company redefining the control and management of every digital system.
The company builds silicon-rooted security and management chips - including the TCU (Trusted Control/Compute Unit) - for AI data center infrastructure, combining platform security, BMC/firmware, and on-chip AI for real-time threat detection and dynamic power/thermal management.
About the role
We're looking for an ML engineer who works across the full stack from model to silicon - comfortable optimizing training and inference performance on GPU/AI-accelerator infrastructure, building or tuning models, and adapting model and inference-engine design to the constraints of the underlying chip and its NPU. You'll move fluidly between algorithm work, systems-level software, and infrastructure work, closing the loop end-to-end rather than owning just one layer of the stack. This is a rare chance to work the full cycle of AI silicon, from model down to chip - something most ML engineers at large companies never get access to.
What you'll do
● Optimize training and inference performance across GPU and AI-accelerator infrastructure, including MLOps pipelines
● Design, train, and evaluate ML models (deep learning, LLM, CV, or recommendation systems) and take them into production
● Harden and extend NPU cores (e.g. building on an open RVV/tensor core like CoralNPU) into production silicon
● Build or optimize inference engines and serving runtimes against real hardware constraints - latency, memory, and power
● Work below the application layer where needed - BMC firmware, embedded Linux, or RTOS (e.g. Zephyr) - so AI features run reliably on real systems
● Build automated test/verification harnesses that close the loop for AI-assisted RTL/DV, hardware bring-up, or manufacturing test
● Apply ML to security - AI-driven log/intrusion analysis, AI-assisted penetration testing, or firmware/hardware security work
● Collaborate closely with RTL/hardware, firmware, and QA teams to ship AI features end-to-end, from training through deployment and monitoring
Qualifications What we're looking for
● 5-7+ years of hands-on AI/ML experience; Master's required, PhD preferred
● Hands-on experience with AI/ML infrastructure and performance - GPU clusters, distributed training, inference-serving optimization, MLOps pipelines
● Model / algorithm development experience - designing, training, and evaluating ML models
● Experience taking models into production - feature engineering, data pipelines, deployment
● AI chip / hardware-aware ML experience - optimizing inference engines for a specific chip, or adapting model architecture/quantization to chip constraints
● Deep, hands-on expertise in at least 2 of the following 5 specialty areas - we don't expect all five:
- NPU / AI-accelerator - hardening or extending an NPU core into production silicon, mapping models onto MAC/tensor-engine constraints, or NPU-aware RTL/DV work
- Systems / Sys-level software - BMC firmware, embedded Linux, RTOS (e.g. Zephyr), or other low-level system software
- Inference engine / runtime - built or materially optimized an inference engine or serving runtime against real hardware constraints
- Test / verification harness - built an automated harness that closes a loop, e.g. an agent-driven RTL/DV test runner or a hardware bring-up / MFG test harness
- Cyber security - AI-driven log/intrusion analysis, AI-assisted penetration testing, or firmware/hardware security